Lesson Notes By Weeks and Term v4 - SHS 1
DATA STORAGE AND MANIPULATION
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DATA STORAGE AND MANIPULATION
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Subject: Computing
Class: SHS 1
Term: 1st Term
Week: 8
Grade code: 1.1.1.LI.4
Strand code: 1
Sub-strand code: 1
Content standard code: 1.1.1.CS.1
Indicator code: 1.1.1.LI.4
Theme: COMPUTER ARCHITECTURE AND ORGANISATION
Subtheme: DATA STORAGE AND MANIPULATION
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Welcome, students! Today, we are going to look inside the "brain" of the computer, the Central Processing Unit (CPU). Every time you tap on an app on your phone, play a video game, or type a message, the CPU is working incredibly fast to make it happen. We will explore how different parts inside the computer talk to each other, just like how drivers use different roads in Accra or Kumasi to get people and goods to specific destinations. Understanding this helps us know why some computers are faster than others and how the simple devices we use every day, like a digital watch or a mobile money POS machine, are able to perform their specific tasks.
This section breaks down the core components and processes that allow a computer to function. A. The System Bus: The Computer's Highway System
Imagine a busy trotro station like Circle or Kaneshie. You have buses (trotros) that carry people, signs that tell you the destination of each bus, and station masters (or "bookmen") who control when the buses move. The computer's system bus works in a similar way. It's a set of parallel wires connecting the CPU to the main memory and other components. It has three main parts: The Address Bus: Function: Carries memory addresses. It tells the memory *where* to find the data or instruction the CPU needs, or *where* to put data. Analogy: This is like the destination sign on a trotro (e.g., "ACCRA-KUMASI"). It only specifies the location, not who or what is on the bus. Direction: It is unidirectional (one-way). The CPU sends addresses *out* to memory. Memory doesn't send addresses back to the CPU. Key Fact: The width of the address bus (number of wires) determines the maximum amount of memory the CPU can access. The Data Bus: Function: This is the actual pathway for moving data and instructions between the CPU, memory, and other components. Analogy: These are the passengers on the trotro. They are the actual "stuff" being moved. Direction: It is bidirectional (two-way). Data can travel *from* the CPU to memory (a write operation) and *from* memory to the CPU (a read operation). The Control Bus: Function: Carries control signals and timing signals from the CPU to manage and coordinate all activities within the computer. Analogy: This is the station master, the traffic warden, or the traffic lights. It gives commands like "Go now," "Stop," "Read data," "Write data." Direction: It is bidirectional, as components can also send signals back to the CPU (e.g., "I'm ready"). Examples of signals: Memory Read, Memory Write, Clock Signal. B. The Internal Clock Function: The internal clock is a component (usually a quartz crystal) that generates regular electronic pulses. These pulses synchronize all the computer's operations. Think of it as the drummer in a band, keeping everyone playing at the right tempo. Clock Speed: The speed of these pulses is called the clock speed, measured in Hertz (Hz). Modern computers have speeds in Gigahertz (GHz), which means billions of cycles (pulses) per second. Impact: A faster clock speed means the CPU can perform more operations per second, making the computer faster. A 3.0 GHz processor can perform 3 billion cycles per second. C. Computer Architectures
This refers to the fundamental design of a computer system. We will look at two key architectures. Von Neumann Architecture Concept: This is the most common architecture for general-purpose computers like desktops, laptops, and smartphones. It was designed by the mathematician John von Neumann. Key Feature: It uses a single memory unit to store both program instructions and data. It also uses a single set of buses to fetch both instructions and data from that memory. The Von Neumann Bottleneck: Because it uses the same bus for both data and instructions, it can't fetch both at the same time. This can create a slowdown or "bottleneck," as the CPU waits for one transfer to finish before starting the next. The Machine Cycle (Fetch-Decode-Execute-Store)
This is the fundamental process the CPU repeats to run programs in a Von Neumann architecture. Analogy: Imagine you are given a simple task: "Add 5 and 3". Fetch: The CPU fetches the next instruction from the main memory (RAM). The address of this instruction is held in a special register called the Program Counter (PC). *Analogy:* You go to your notebook and get the instruction "Add 5 and 3". Decode: The instruction is sent to the Control Unit (CU) and is interpreted or "decoded." The CU figures out what needs to be done (e.g., an addition operation) and which parts of the CPU are needed. *Analogy:* You read the instruction and understand that you need to perform addition on two numbers. Execute: The Arithmetic Logic Unit (ALU) performs the actual calculation or operation. Data might be fetched from memory if needed. *Analogy:* Your brain performs the calculation: 5 + 3 = 8. Store: The result of the execution is stored either in a temporary location in the CPU (a register) or written back to the main memory. *Analogy:* You write the answer '8' back into your notebook.