Lesson Notes By Weeks and Term v4 - SHS 1

Lesson Video

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Performance objectives

• Describe the function of the system buses and internal clock.
• Explain the Von Neumann architecture.
• Illustrate the Fetch-Decode-Execute-Store cycle.
• Differentiate between Von Neumann and Harvard architectures.
• Discuss the role of an instruction set.

Lesson summary

Welcome, learners! Every day, we use devices like smartphones, laptops, and even the digital prepaid meters at home. But have you ever wondered how these devices actually *think*? How does your phone know to open WhatsApp when you tap the icon? How does a calculator know how to add two numbers? Today, we are going on a journey inside the computer's "brain"—the Central Processing Unit (CPU). We will learn about the secret highways (buses) that carry information, the "drumbeat" (internal clock) that keeps everything in sync, and the step-by-step process the CPU follows to get any job done.

Lesson notes

Analogy: The Makola Market Post Office

Imagine the CPU is the main manager of a very busy post office inside Makola Market. This post office has to send and receive parcels (data) from different stalls (memory locations). To do this efficiently, the manager needs a system. This system is what we call the computer architecture. A. The System Bus: The Highways of the Computer

The System Bus is a set of parallel wires connecting the major components of a computer (CPU, Memory, I/O devices). Think of them as the roads in and out of our Makola post office. There are three main types of buses: Address Bus: What it does: Carries memory addresses. The CPU uses this bus to specify a precise location in memory (RAM) where it needs to read data from or write data to. Analogy: When the post office manager wants to get a parcel from Stall #54, he writes "Stall #54" on a note and sends a messenger down a specific road just for addresses. This road is the Address Bus. Key Feature: It is unidirectional (one-way). The CPU sends addresses *out* to memory and other devices. Memory does not send addresses back to the CPU. Data Bus: What it does: Carries the actual data or instructions being processed between the CPU, memory, and other components. Analogy: This is the main road where the actual parcels (data) are carried. The messenger can take a parcel *from* Stall #54 to the post office, or take a new parcel *to* Stall #54. Key Feature: It is bidirectional (two-way). Data can travel to and from the CPU. Control Bus: What it does: Carries control signals and timing signals from the CPU to manage and coordinate all activities within the computer. It tells other components what to do and when. Analogy: This is like the post office manager using a megaphone or a system of traffic lights. He shouts commands like "Memory, get ready to READ!", "Device, are you ready to receive data?", or "Everyone, stop!". It ensures there are no collisions and everything happens in an orderly fashion. Key Feature: It is bidirectional, as components can also send signals back to the CPU (e.g., "Data has been received!"). B. The Internal Clock What it is: A tiny quartz crystal that vibrates at a very high and steady rate. Each vibration generates a regular electronic pulse, or "tick". What it does: It synchronises all the computer's operations. The CPU performs one action for each clock tick. Analogy: Think of a leader beating a drum for a group of rowers in a canoe. Every time the drum beats, the rowers pull their oars. A faster drumbeat means the canoe moves faster. Measurement: Clock speed is measured in Hertz (Hz). 1 KHz (Kilohertz) = 1,000 ticks per second. 1 MHz (Megahertz) = 1 million ticks per second. 1 GHz (Gigahertz) = 1 billion ticks per second. A 3.2 GHz processor gets 3.2 billion "ticks" or chances to do something every second! C. The Machine Cycle (The CPU's Work Process)

The CPU executes instructions by following a four-step cycle for every single instruction. This is called the Machine Instruction Cycle or Fetch-Decode-Execute-Store Cycle.

Evaluation guide

• Understand and explain the control bus, address bus, data bus and the internal
• clock, Machine Cycle, Von Neumann architecture (Fetch –Decode –Execute -Store
• Cycle), instruction set for a CPU , Harvard architecture and embedded systems
• Group Activity: